COMP3211/9211 04s2 Tutorial 1 (Weeks 02 & 03) --------------------------------------------- The selection of tutorial questions is intended to provide coverage of topics felt to be relevant to this Session's presentation. There are many more questions listed than it is possible to cover during the tutorial. I will therefore label them as W = warmup exercise (simple exercises that you should be able to do without coaching or assistance - I would recommend you try these before the class); D = discuss (these questions are prime candidates for further discussion - you should prepare for these before the class); and F = followup (you should attempt these as soon as possible after the tutorial class to practice your skills, and get a different insight into tutorial questions covered in class). Exam questions are more likely to be similar in style to D and F type questions. Note: Hand-in exercises will commence with this Tutorial. Normally these exercises will need to be handed in during your usual tutorial time. For those people taking a tutorial this week, I will allow you to email your solution to your tutor by 5.00pm Friday of Week 02 i.e. 6 August. Where I have a copy, or have time to copy the text, I will include the question details. For the rest you will need to source the problem yourselves. Key: SRQ = Stallings, Review Question; SP = Stallings Problem; P = Patterson & Hennessy Exercise (Note you will in general need to source the P problems in a copy of the Second Edition); Y = Yalamanchili Hand-in Exercise ---------------- For "even" tute classes, send in by email to your tutor by 5.00pm 6 August. For "odd" tute classes, prepare a plain (ascii) text file and hand in at the start of your tute class during Week 03. This exercise will be marked and contribute to your final assessment in the course. You should spend about 15 minutes on this question. Q01. [P1.55] A less technically inclined friend has asked you to explain how computers work. Write a detailed ONE PAGE description for your friend. Warmup Exercises ---------------- Q02. [P1.1] - [P1.26] Q03. [P2.1] We wish to compare the performance of two different machines: M1 and M2. The following measurements have been make on these machines: program time on M1 time on M2 1 10 seconds 5 seconds 2 3 seconds 4 seconds Which machine is faster for each program and by how much? Q04. [P2.2] Consider the two machines and programs in P2.1. The following additional measurements were made: program instructions executed on M1 instructions executed on M2 1 200 x 10^6 160 x 10^6 Find the instruction execution rate (instructions per second) for each machine when running program 1. Q05. [P2.3] If the clock rates of machines M1 and M2 in P2.1 are 200MHz and 300MHz, respectively, find the clock cycles per instruction (CPI) for program 1 on both machines using the data in P2.1 and P2.2 Q06. [P2.4] Q07. [P2.5] Suppose that M1 in P2.1 costs $10,000 and M2 costs $15,000. If you needed to run the program 1 a large number of times (i.e., if you were concerned with throughput instead of response time), which machine would you buy in large quantities? Why? Q08. [P3.2] Q09. [P3.3] Discussion Questions -------------------- Q10. [P1.48] Q11. [P2.10] Consider two different implementations, M1 and M2, of the same instruction set. There are four classes of instructions (A, B, C, and D) in the instruction set. M1 has a clock rate of 500 MHz. The average number of cycles for each instruction class on M1 is as follows: class CPI for this class A 1 B 2 C 3 D 4 M2 has a clock rate of 750 MHz. The average number of cycles for each instruction class on M2 is as follows: class CPI for this class A 2 B 2 C 4 D 4 Assume that peak performance is defined as the fastest rate that a machine can execute an instruction sequence chosen to maximize that rate. What are the peak performances of M1 and M2 expressed as instructions per second? Q12. [P2.13] Q13. [P2.15] Q14. [P3.14] Q15. [P3.16] Follow-up Questions ------------------- Q16. [P1.56] Q17. [P2.41] Suppose we enhance a machine to make all floating-point instructions run five times faster. Let's look at how speedup behaves when we incorporate the faster floating-point hardware. If the execution time of some benchmark before the floating-point enhancement is 10 seconds, what will the speedup be if half of the 10 seconds is spent executing floating-point instructions? Q18. [P2.42] We are looking for a benchmark to show off the new floating-point unit described in P2.41, and we want the overall benchmark to show a speedup of 3. One benchmark we are considering runs for 100 seconds with the old floating-point hardware. How much of the initial execution time would floating-point instructions have to account for to show an overall speedup of 3 on this benchmark? Q19. [P3.11] VHDL Exercises -------------- Q20. [Y3.3] Sketch the output waveform produced by the following VHDL concurrent signal assignment statements: s1 <= '0' after 5 ns, '1' after 15 ns, '0' after 35 ns, '1' after 50 ns; s2 <= '0' after 20 ns, '1' after 25 ns, '0' after 50 ns; Q21. [Y3.6] Write and simulate the entity-architecture description of a 3-bit decoder using the conditional signal assignment statement. Test the model with all possible combinations of inputs and plot the decoder output waveform. Try to use the ISE/WebPACK tool for this and following exercises. Q22. Write and simulate the entity-architecture description of a single bit slice of a universal shifter using the conditional signal assignment statement. The slice should have left, right, and load inputs, a 2-bit direction input, and a single output bit. Test the model with all possible combinations of inputs and plot the shift slice output waveform. Q23. [Y3.9] Why are the concepts of delta events and delta delays necessary for the correct event simulation of digital circuits?