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Homework Assignment 1


H

b3

b2

b1

b0

g

H

b3

b2

b1

b0

g

0

0

0

0

0

0

8

1

0

0

0

1

1

0

0

0

1

0

9

1

0

0

1

1

2

0

0

1

0

1

A

1

0

1

0

1

3

0

0

1

1

1

B

1

0

1

1

1

4

0

1

0

0

1

C

1

1

0

-0

0

5

0

1

0

1

1

D

1

1

0

1

1

6

0

1

1

0

1

E

1

1

1

0

1

7

0

1

1

1

0

F

1

1

1

1

1

The truth table for segment g is made into a Karnaugh map to minimize the SOP equation.

There are other ways in which the groups can be drawn but they all give the same result:  The implementation requires 4 2-input AND gates (NAND gates in this problem), 1 three input AND (or NAND) gate and 1 5-input OR gate (NAND in this implementation).  The cost is therefore 22 ( 6 gates plus 16 inputs).  The function can be implemented less expensively by looking for the 0's in the TT.

Implementing this function requires 1 3-input AND gate, 2 4-input AND gates, 1 3-input OR gate, and 1 INVERTER.  Since inverters are not counted, the cost is 18 ( 4 gates and 14 inputs).

When implemented in LogicWorks one obtains:


 

The MULTIPLEXER implementation for Segment A is given by:


H

X3

X2

X1

X0

a

H

X3

X2

X1

X0

a

0

0

0

0

0

1

8

1

0

0

0

1
X0#

1

1

0

0

0

1

0

9

1

0

0

1

1

2

0

0

1

0

1

A

1

0

1

0

1

1

X0#

3

0

0

1

1

1

B

1

0

1

1

0

4

0

1

0

0

0

C

1

1

0

-0

1

X0

X0#

5

0

1

0

1

1

D

1

1

0

1

0

6

0

1

1

0

1

E

1

1

1

0

1

1

1

7

0

1

1

1

1

F

1

1

1

1

1