1. Figure 1 Shows a circuit and the input waveforms. On the diagram, draw the waveforms of the outputs C and D. Show the number of gate propagation delays relative to the nearest dashed vertical line.
2. Figure 2 shows a 7 segment DECIMAL DISPLAY.
(a) Draw the truth table
for segment "f".
(b) Use a Karnaugh map to
derive the minimal sum of products.
(c) Implement the function
using only NAND gates (any number of inputs). In
answering this question and in part d you may assume that the
inverted
forms of the input variables are available and need not show the
inverters.
(d) Use a 8 input multiplexer
to form a circuit to implement segment "f".
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Implementing this function requires 1 3-input NAND gate, 3 2-input NAND gates, and 1 4-input NAND gate.
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
| X0# |
|
|||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
Please note that although the bottom three inputs of the MUX are shown as not being connected because they will never be selected, it is usually safer to connect them either to Vcc or ground.
3. A and B are two signed
hexadecimal numbers in 2's complement form.
A = C72
and B = D8E. See the table of powers of 16 at the bottom
of
the exam.
(a) Convert A to octal.
C72 = 1100 0111 0010 = 110 001 110 010 = 6162 Octal
(b) Subtract B from A and show the result in hexadecimal.
To subtract B we must add its 2's complement. D8E = 1101
1000 1110
Its 2's complement is 0010 0111 0010. Therefore:
1100 0111 0010
0010 0111 0010
= 1110 1110 0100 = EE4 Hexadecimal
(c) Show the value of the result in part b in decimal.
EE4 is a negative number. To find its decimal value, we
take its 2's
complement.
0001 0001 1100 = 11C= 1 * 162 + 1 * 161 + 12 * 160 = 256 +16 + 12 = 284.
The result of the subtraction is therefore -284.
4. A finite state machine ( FSM ) has 2 inputs, X and R, and a single output Y. When R is true it resets the machine to its initial state and sets the output to 0. When R is 0, the machine outputs a 1 only when the last input is the same as the previous one. Draw the transition diagram for the FSM.
5. (a) Draw a circuit diagram for a 3 bit synchronous up/down counter that counts up when its control line is 0 and down when it is 1. You need not show the gates that make up the flip-flops or multiplexers, but you must label clearly all inputs, outputs, and control lines to the flip-flops and multiplexers.
(b) What
is the disadvantage in using a ripple counter rather than a
synchronous one?
In a ripple counter the clock goes from one stage to the next.
Each
flip-flop therefore introduces an additional delay from the master
clock
This introduces glitches into the count because the output stages
change at different times.
;