While the industry has adopted SoC design for many years, the academic community around the world (India not being an exception) has not caught up with the state-of-the-art. Electrical/Electronics Engineering departments continue to teach a course on VLSI design, where the level of design abstraction is device-level, transistor-level, or gate-level. Register-transfer-level (RTL) design using hardware description languages is taught in some Masters’ programs, but colleges often do not have the lab infrastructure to carry out large design projects; very few Indian universities have tie-ups with foundry services to get samples. A semester is too short a time to complete a large project. The complexity of modern-day design flow is not easy to impart in a single undergraduate course. Masters’ programs are particularly relevant in VLSI, but the M.Tech programs in the country languish due to several reasons.

Ground Realities
M.Tech programs do not attract top students who are highly motivated, said a Professor who attended the two-day faculty development program organized by VLSI Society of India during Oct 30-31, 2010. Almost all undergraduate programs today have a course on VLSI technology and design. But since we get students from different backgrounds, they do not have the pre-requisites. So a course on VLSI design at M.Tech level will have a significant overlap with an undergraduate course on VLSI design.
Faculty members need training, said another teacher. When a new course is introduced, significant time is needed for preparation. Prescribed textbooks for a new course are often not available. Internet search for course materials often returns too much material and it is hard to decide what to use. Colleges that have autonomy can decide their own curriculum, but in a University setup, the faculty face a major challenge. We are evaluated on how well our students fare in the exams. Yet, our students have to face an exam made by a central committee.
Having a common exam poses many problems in setting up a relevant question paper. The format of the question paper is fixed. The students get a choice of answering 5 questions from a set of 8. Due to the common nature of the question paper, the questions tend to demand descriptive answers.

The workshop provided a forum for industry-academia interaction. Several professionals from the industry took part in the workshop and answered questions from the faculty members. Dr. C.P. Ravikumar, Mr. Sarveswara Tammali and Dr. Subir Roy of Texas Instruments and Mr. Raghu Kodali (ARM) took part in the workshop. C.P. Ravikumar coordinated the workshop and explained the motivation for SoC design in general and for the workshop in particular. Sarveswara Tammali spoke on the topic of “Design for Testability” as applied to SoC. Subir Roy spoke about the topic of functional verification of SoC. Raghu Kodali used the example of ARM Cortex-M3 to discuss the entire IP design flow. Apart from the tutorial value of the presentations made at the workshop, the faculty gained through interaction with professionals as well as the discussion on the challenges of teaching advanced topics and the sharing of solutions.

Homework-oriented Workshop
At the end of Day 1, faculty members received “homework” of identifying the topics that they would include in the 7 sections of a course on SoC Design. The faculty presented their ideas on Day 2 and through lively debates were able to align on the teaching materials, the kind of seminars the students can be asked to give as part of the course, the kind of mini-projects that can be given to students, and typical questions that can be included in the course.

“The workshop has allowed faculty members to come together to engage in a healthy debate, seek/propose solutions to their problems,” was one of the several enthusiastic feedbacks for the workshop. It was also decided that a website will be created to share the Proceedings of the workshop as well as the links to teaching materials for a course on SoC Design.