A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET’s Technology Development and Circuit Simulation

29-Mar-00

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Table of Contents

A Novel Approach to Compact I-V Modeling for Deep-Submicron MOSFET’s Technology Development and Circuit Simulation

Outline of Presentation and Approach

Summary of Model Formulation

Macromodel View of a MOSFET: Definition of Parameters

Vertical Nonuniform Doping Transformation

Charge Sharing and Barrier Lowering

2-D Pile-up Charge for Reverse Short Channel Effect (RSCE)

Ids Model Formulation: Vertical-Field Mobility Modeling

Ids Model Formulation: S/D Series Resistance Modeling

CLM – Velocity Saturation/Overshoot Modeling: Calculated Channel Field & Modeled Average Field

Subthreshold Current Modeling

De-embedding the Edge-Leakage (Coner) Current in STI Structure

Vt Parameter Extraction

Ids Parameter Extraction: Mobility, Bulk Charge, Series Resistance

Ids Parameter Extraction: CLM, Subthreshold, Edge-Leakage Current

Length-Dependent Output Characteristics

Length-Dependent Turn-on/Leakage Current Prediction

Saturation Current Prediction

Leakage Current Prediction

Conclusions

Author: X. Zhou 

Email: exzhou@ntu.edu.sg

Home Page: http://www.ntu.edu.sg/home/exzhou/Research/DOUST/intro.htm