The type of memory we have been discussing is solid-state memory. Solid-state means the memory is stored in specially designed solid materials that form transistor circuits. Improvements in technology has been allowing more and more transistors to be put on single pieces of silicon forming integrated circuits commonly called IC chips or just chips. More and more transistors on a single chip means greater and greater memory on a single chip.
Memory chips and are manufactured in many different configurations. For example, it might be possible to buy a chip able to handle 16 bits of address bus but only 1 bit of data bus. It may also be possible to buy a chip with only 14 bits of address bus but 8 bits of data bus. Normally, similar chips are combined together to form the type of memory needed. if 8 of the 16 bit address X 1 bit data were combined we would have memory for all of the 8 bit data for 65,536 addresses. A diagram of this is shown below.
Notice the following things about this picture
We can also use 4 of the 14 bit addresses X 8 bit data and achieve the same thing. There is one little problem with this idea. How do we wire all 16 lines of the computer addresses to only 14 bit address wires on the chip?
In the last section we talked about the address decode logic. This logic can be part of the chip or it can be some external circuits. Since 14 bits of the 16 bit address bus are decoded inside each memory chip, the two most significant bits are decoded using external logic. This is shown on the next diagram. This logic determines which memory chip is active by enabling chip select lines.
Notice the following things about this picture
Because the numbers we are working with are rapidly becoming very large, memory is often divided into segments. For example, in our last picture it would make sense to divide the memory into 4 segments of 16384 bytes each. However, another, more common method of dividing memory into segments is to mentally cut the address bus into half. With the 16 bit address bus we are working with this would become two 8 bit halves and one would be referred to as the low byte half of the bus and the other would be the high or most significant half of the bus.
If we group all of the addresses covered by a low half of the address bus together we can call this a "page" of memory. We would then have 256 pages of memory with each page containing 256 bytes of data. The size of a page is not a absolute defined word in this context, and is defined by the the manufacturer of the processor of the system.
So far we have talked about how address, data, and the r/w wires going into a memory chip can put data into memory and read it from memory, but we still have not though about one critical problem. What happens when the power is shut off to the memory?
When the power is shut down to most memory, the data inside simply "evaporates" or disappears. The memory is said to be volatile memory. There are special types of memory designed to not loose data when the computer is powered down. This is important to contain the instructions that tell the computer how to start-up once power has been lost.
There are probably many ways of self checking the computer memory. However, I know of only two common methods.
The first method is part of a test called POST which stands for Power On Self Test. During this test some or all of the memory has numbers written to it and is then read to determine if the same number is read. Next a different number is written into the memory and read. The goal of this test is to test every bit in the section of memory to make sure it can contain a 1 and a zero.
You may and probably did notice the statement "some or all of the memory". Why not always all of the memory? Someone, somewhere, did an analysis and determined the "cost" of waiting during the start-up process to check every memory location was not worth the benefit of checking the small probability of the memory failing. The check of the section of memory checked the circuitry to the memory so the items with the highest probability of error were checked.
The second memory check is the addition of an extra bit of memory for each address. In other words, in our 8 bit memory system, we would have 9 bits per address. The extra bit is called a parity bit and is set to 1 if there is an even number of 1's written in the other 8 bits and is set to 0 if the number of bits set to 1 is an odd number. When the memory is read, this is again checked and if it does not match, the computer faults on a memory parity error. This function is often not implemented or is by-passed with memory that implements a pseudo-parity check and fakes the check to the computer.
It is now the moment you have been anxiously awaiting. Time to wade into some of those wonderful acronyms thrown around in computer systems
RAM stands for Random Access Memory and is the type of memory we have been discussing. This is read-write memory where any address location can be accessed by calling up the address for the location. The data evaporates when power is removed.
DRAM is a sub-class of RAM and stands for Dynamic RAM. Dynamic RAM is much easier to implement on the IC chip and has a much higher density of memory cells per area of the chip. The trade-off with this type of memory is the memory fades away after a short period of time and it must be refreshed periodically. This requires extra circuitry to perform this operation called "the refresh cycle". Most memory used on personal computers (PC's) is of this type, because the cost savings for the higher density is greater that the costs to implement the extra operation.
SRAM is also a sub-class of RAM and stands for Static RAM. This memory does not have the memory fade problem described for DRAM, but does have the lower density problem. Therefore it has a higher cost per byte of memory. This memory is volatile and data is lost when power is lost.
ROM stands for Read Only Memory. The memory is still accessed using address locations, but has no R/W line connection. The traditional version of this type of memory was designed with internal connections permanently creating the memory values.
PROM is a subclass of ROM that allows the system designer to used a one time programming device. The PROM is initially supplied with 0 in each location. The programming device applies enough current to burn open unwanted connects, creating 1's in these locations. At one time this type of memory was called a WORM for Write Once Read Many.
EPROM is a little more flexible type of ROM. EPROM stands for Erasable Programable Read Only Memory and is programmed by using a special programming device that applies charges to selectively enable transistors. This memory is permanent until it is erased by exposing it to a strong ultraviolet light. This type of memory chip can easily be identified by the clear window on the chip body.
EEPROM stands for Electrically Erasable Programmable Read Only Memory. This memory is similar to EPROM Memory, but it can also be erased by sending special signals to it. Often the programming and erasing circuitry is build in on special types of computers using this type of memory. It is very useful to store parameters and settings that will not change often. Examples are point of sell devices and industrial equipment.
Flash Memory is a special type of EEPROM. It is faster than EEPROMS because instead of erasing at one byte at a time, it erases whole sections.
NvRAM is basically standard SRAM with a battery built in the case to maintain power on the electronics within the chip even when the equipment power is off.