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In Cooperation With: IEEE-CS-TTTC and IEEE EDS/SSCS Bangalore Chapter (Confirmation Awaited) Related Site: http://vlsi.ccrl.nj.nec.com
Topics of Workshops: The following workshops will be held concurrently: Workshop on High-level Design will
discuss issues related to system-level synthesis, embedded systems, codesign,
core-based design of SoC, timing convergence, high-level synthesis, logic
synthesis, memory synthesis, and FPGA synthesis. Workshop on Physical Design and VLSI Technology
will discuss all issues related to physical design and process related
aspects of integrated circuits, such as layout, fabrication, packaging,
opto-electronic circuits, MEMS, deep submicron and nanometer devices. Workshop on Testing and
Verification will discuss issues related to testing, testability, and
verification of digital designs, memories, analog designs, and mixed-signal
designs, and circuits containing deep-submicron and nanometer devices.
In addition, VLSI Education Day (VED
2003) will be held as part of VDAT 2003, on August 28, 2003. Conference Committee General Chair: C.P. Ravikumar, Texas Instruments India Technical Program Committee Vishwani Agrawal, Rutgers University, USA Jagannathan Balaji, Purple Vision Technologies, India M. Balakrishnan, IIT Delhi Narasimha Bhat, Synopsys, India Navakanta Bhat, IISc, Bangalore, India Bhargab Bhattacharya, ISI Calcutta, India P. Chakrabarti, Banaras Hindu University Srimat Chakradhar, NEC, USA A.N. Chandorkar, IIT Mumbai, India Anil Gundurao, Cypress Semiconductors, India Harishchandra Hebbar, MAHE, Manipal Suresh Honnenahalli, Magma Design Automation, USA S. Karthik, Analog Devices, India Anshul Kumar, IIT Delhi, India S. Mahant-Shetti, KARMIC, India N.S. Murthy, Philips Semiconductors, India S. Nandi, IIT Guwahati R. Parekhji, Texas Instruments, India Dipankar Nagchoudhuri, IIT Delhi, India S. Ramesh, IIT Mumbai, India C.P. Ravikumar, Texas Instruments, India Vineet Sahula, MREC Jaipur G.H. Sarma, VLSI Society of India Narendra Shenoy, Synopsys, India Alok Singh, Virage Logic, India P. Sridhar, Controlnet, India S. Srinivasan, IIT Madras, India V. Visvanathan, Texas Instruments, India ADDRESS FOR
CORRESPONDENCE Authors should submit extended abstracts
for talks, proposals for embedded tutorials (1 hour or 2 hour duration), and proposals
for panel discussions or special sessions, to: C.P. Ravikumar APDC, Texas Instruments, India Wind Tunnel Road, MurgeshpalyaBangalore 560017 Email: cpravikumar@rediffmail.com FAX: 91-80-5269456
If submitting by email, the author must use ASCII text or PDF formats.
IMPORTANT
DATES Last Date for submission: March 31, 2003 Notification of acceptance: May 15, 2003 Last day to receive final manuscript: June
1, 2003 Workshop Dates: August 28-30, 2003 NOTE: The workshops are a forum to promote research and
development in all aspects of VLSI in India. Authors of accepted papers will
not be required to submit full papers, although they are encouraged to do so.
All authors of accepted papers are, however, required to submit Presentation
Foils of their talks in PowerPoint or PDF format. Final submissions (full
papers or presentations) will be available as Workshop Proceedings. Papers
presented in the workshops may be revised and published/presented in other
forums.
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