VLSI Education Day 2000
Advance Program
(http://vlsi_india.tripod.com/ved00/adpgm.html)
August 27, 2000
New Delhi, India

Scope: To promote efforts towards VLSI Education in India
Sponsors: Cadence, India; ControlNet, India; Philips Semiconductors, India;  RealChip, India; VirageLogic, India;
     With Support From : Indian Institute of Technology, Delhi
 Venue : Seminar Hall, Indian Institute of Technology, Delhi

8:00 to 9:00 AM
Registration
9.00 AM-10.30 AM
 Session 1 : Panel Discussion on Status of VLSI Education in India
Moderator: C.P. Ravikumar
History Panelists: D. Nagchoudhuri (IIT Delhi), Vinay Shenoy (Philips), S.D. Sherlekar (SAS), G.H. Sarma (ITI), U. Phadke (MoIT), Vishwani Agrawal.
Present
Projections
Tea & Time for Visiting Exhibits
11: 30 AM - 1.00 PM
Session 2: Panel discussion on Model Curriculum
Moderator: M. Balakrishnan
What is being taught? Panelists:  Anshul Kumar, Apurva Kalia, R. Parekhji,Dinesh Bhatia,E. Gopinathan, D. Boolchandani.
What is needed?
Convergence
1:00 PM to 2:00 AM
 Lunch & Time for Visiting Exhibits
2.00 PM to 400 PM
Session 3A (Venue: EE Committee Room, IIT Delhi)
ASIC Design Flow: A Perspective. Vinod Menezes, Texas Instruments, Bangalore. Invited Talk.
Session 3B (Venue: Seminar Hall, IIT Delhi)
Panel Discussion on Synergy between VLSI Industry and Academia
Moderator: G.S. Visweswaran
Opportunities in VLSI Education Panelists: R. Srinivasan (ControlNet), V. Ranganathan (RealChip), Shubhra Aurita Roy (Intel), M. Balakrishnan (IIT Delhi), Pieter Van der Wolf
Resources (Books, software)
Synergy between VLSI Industry and Academia
4:00 to 5.00 PM
Tea & Time for Exhibits
6:00 PM
End of Day
Exhibits
Exhihits will be located in the foyer area of the Seminar Hall of IIT Delhi during 9.00 AM - 5.00 PM.
DSP Design Environment. Texas Instruments.
FPGA Demo Board Asheesh Shah , IIT Delhi.
Book Exhibition Technical Book Stores
EDA software developed at U. of Calcutta Shefali Bose
Industry-Institute-Student Interaction. Varun Soni, fundooideas.com
DSP and 32-BIT MCU MCORE Motorola


VLSI Education Day Committee

Vishwani Agrawal, Bell Labs, Lucent Technologies
Vishwanath Arkalgud, Philips, Bangalore, India
M. Balakrishnan, IIT Delhi
Apurva Kalia, Cadence Design Systems, Noida, India
Gopal Mani, CRL, BEL, Bangalore
S. Mohapatra, Texas Instruments, India		 S. Nagaraj, Texas Instruments, Bangalore, India
D. Nagchoudhury, IIT Delhi
V. Ranganathan, RealChip, Chennai, India
C.P. Ravikumar, IIT Delhi
R. Srinivasan, ControlNet, Goa, India
Prof. Vasagam, Tanitec, Chennai, India

Registration Information:
There is no separate registration fee for VED 2000 if you register for the VLSI Design and Test Workshops, 2000 which are being held on August 25-26, 2000. Registration permits you to participate in all the technical sessions and tutorials organized as part of the workshops as well as the Education Day.  Refreshments and lunch will be provided to all registrants at no extra charge.  Please send your registration fee through a draft  made out to VLSI Design and Test Workshops, 2000.   Make the  draft payable at Canara Bank, IIT Delhi Hauz Khas Branch.  The draft must be sent to Prof. C.P. Ravikumar, Department of Electrical Engineering,  Indian Institute of Technology, New Delhi, 110016, India.   If you wish to register on the spot,  drafts and cash  payment in Indian rupees are acceptable.   We will not be able to accept Foreign Currency or Credit Card payments.  The current exchange rate is approximately 1 US dollar = 45 Indian rupees.
Registration Fees Before July 20, 2000
Indian Participant Foreign Participant
Academic Institution
Rs. 2000
USD. 50
Non-academic Institution
Rs. 4000
USD. 150

Registration Fees After July 20, 2000

Indian Participant Foreign Participant
Academic Institution
Rs. 2500
USD. 75
Non-academic Institution
Rs. 4500
USD. 175

Venue Information: The VLSI Design and Test Workshops will be held at the Habitat World, New Delhi. The VLSI Education Day will be held at the Seminar Hall, Indian Institute of Technology, Delhi. Contact numbers for The Habitat World are:+91 11 469-1920 and +91 11 469-1921.  FAX number is +91 11 460-2118.  There are several Web sites that will give you information about travel and stay in New Delhi,  including www.delhizone.com.  A map showing the location of Habitat World in New Delhi is available at  www.iiefair.com/habitatmap.html .  Habitat World is located at Lodi Road, New Delhi and a pre-paid taxi from the air port to a hotel  around this area will cost Rs. 200 (About 5 US Dollars). You must enter from Gate 2.  Prepaid taxis can be hired at the airport itself.  Tipping the taxi driver is not necessary.  Alternative accommodation may be available in guest houses of organizations within New Delhi; you must contact the organizing chair before Aug 1, 2000 regarding this.  IIT Delhi is located in Hauz Khas and is about 15 Km from the Airport or the New Delhi Railway Station. The cost of a taxi from the Airport is about Rs. 150/-. More information about IIT Delhi is available from http://www.iitd.ernet.in

Weather Information:The weather in New Delhi in August is hot (temperatures ranging in 30 degrees to 35 degrees centigrade), with inermittent rain.  Umbrellas are recommended.
Contact Information: In case you have any questions, please contact C.P. Ravikumar (rkumar@ee.iitd.ernet.in) for clarifications.  E-mail can also be sent to cpravikumar@rediffmail.com.
Fellowships: :A small number of full or partial waiver of registration fee is available for Indian students and Indian faculty.  Preference will be given to attendees who request for partial waiver.  Write to the organizing chair with a statement of purpose for attending the workshops before July 20, 2000.  Please note that travel support and staying arrangements will have to be made by the participant who avails the free registration.
14th International Conference on VLSI Design,  Bangalore, Jan 2000 (http://vlsi.ccrl.nj.nec.com)

           VLSI Design and Test Workshops (http://vlsi_india.tripod.com/vdat00/adpgm.html)